I. Field of the Invention
This invention relates generally to the field of wireless RF transmitters, and more specifically, to a BALUN circuit for combining the outputs of a differential power amplifier.
II. Background
Power amplifiers are key to any high frequency RF transmitter design. This is because transmitters typically require high output power to compensate for path losses and to achieve satisfactory signal levels at the system antennae. But high frequency power amplifier designs are also subject to performance losses due to parasitic losses in the power amplifier package.
Additionally, transmitter designs for portable wireless communications devices require lower operating voltages in order to increase battery life. The lower operating voltages decrease the system""s noise margin. The high gain of the power amplifier means the increased noise level at the amplifier input will be magnified at the amplifier output. This high noise content in the power amplifier output seriously degrades the transmitter""s performance.
Another factor that contributes to noise problems in a power amplifier design is that portable system designs also create a need for compact size. This translates into higher integration and smaller packages for portable application components like power amplifiers. The smaller packaging and higher integration means that circuit components are more susceptible to noise from other circuits. The power amplifier will amplify any added noise at the amplifier input, magnifying the problem.
One way to combat these problems for power amplifier design is to use a differential design approach. The differential design increases the amplifier""s noise rejection and reduces the effects of parasitic losses. It will also minimize the need for root physical RF ground, due to the inherent virtual ground in a differential design. But the use of a differential output stage requires that both the positive and negative phase outputs be recombined for maximum efficiency.
A BALUN is a wideband transformer that is capable of matching a balanced line, such as a twin lead, to an unbalanced line, e.g., a coaxial cable. Conventional BALUN designs are not suitable for recombining the positive and negative phase outputs of a differential power amplifier either because they do not permit suitable output impedance matching, take up too much area, cost too much or be hard to implement.
Low cost commercial (as opposed to military) ceramic BALUNS, for example, have a purely resistive output impedance, which is incompatible with what is typically a reactive output impedance of the power amplifier. Military grade ceramic BALUNS can be designed to have reactive output impedance, but this is not a cost-effective solution.
Another example is a design that matches the amplifier output to a standard impedance value and then uses a quarter shielded coax center conductor and shield to create a BALUN. But this creates the need to install a trimmed piece of coax, which is wasteful of space, and which can be time consuming and susceptible to errors in a manufacturing environment.
Another example is a design that uses the same match on the positive phase and negative phase outputs and then adds a 180-degree transmission line to adjust the phase of the negative phase output before recombining it with the positive phase output. But this approach takes a large amount of printed circuit board area and has inherent amplitude and phase mismatches during the recombination process. The mismatch results in low power transfer efficiency, which is a key power amplifier design parameter.
Thus, there is a need for a BALUN circuit for combining the outputs of a differential power amplifier that overcomes the disadvantages of the prior art.
In accordance with the invention as described in this document, a BALUN circuit in accordance with the subject invention comprises a lead network, a lag network, and a delay element. The lead network is connected to the positive phase output of a differential power amplifier (PA). The lag network is connected to the negative phase output of the differential PA. The delay element follows and is coupled in series with the lag network. The outputs of the lead network and the delay element are combined to form the single-ended output of the PA.
The lead network is configured to advance the phase of the positive phase output of the PA. The lag network is configured to retard the phase of the negative phase output of the PA. The delay element further retards the phase of the negative phase output of the PA such that, at the point of combination, the phases of the two outputs are approximately equal.
Each of the outputs of the differential PA is assumed to have arbitrary impedance having resistive and reactive components. In one embodiment, the BALUN circuit of the subject invention is configured to transform the arbitrary complex impedance of the PA outputs to a desired output impedance of the single-ended output of the PA. In one implementation, the desired output impedance is purely a resistive impedance Z0. In this implementation, the lead network is configured to transform the assumed complex impedance of the PA""s positive phase output to about twice Z0, and the lag network is also configured to transform the assumed complex impedance of the PA""s negative phase output to about twice Z0. Similarly, in this implementation, the impedance of the delay element is about twice Z0. The impedance of the single-ended output, which is the parallel combination of the output impedance of the lead network and the phase element, is about Z0 as desired.
For purposes of this disclosure, phrases such as xe2x80x9caboutxe2x80x9d or xe2x80x9capproximatelyxe2x80x9d or xe2x80x9csubstantiallyxe2x80x9d are intended to allow for tolerances which are acceptable to those of skill in the art who practice the invention.
It should be noted that the impedance of the delay element can be different than twice Z0. In this case, the delay element becomes part of the lag network impedance transformer. However, the design is more complex and the bandwidth is usually very narrow. Therefore, it is advantageous if the impedance of the delay element is about equal to the desired impedance of twice Z0.
In one embodiment, the lead network comprises a high pass LC (inductor-capacitor) circuit, and the lag network comprises a low pass LC circuit. In this embodiment, the component values of the high pass circuit are selected such that the phase of the positive PA output is advanced by a first amount. In addition, in this embodiment, the component values of the low pass circuit are selected such that the phase of the negative PA output is retarded by a second amount. The delay element is configured such that the phase of the negative PA output is further retarded by a third amount. The first, second, and third amounts are such that the phase of the PA outputs at the point of combination is about equal.
In one implementation, the component values of the high pass network are selected using a Smith chart or the like such that the output impedance of the high pass network is about 2Z0. In addition, in this implementation, the component values of the low pass network are also selected using a Smith chart or the like such that the output impedance of the low pass network is about 2Z0.
In one implementation example, the inductors in the high and low pass networks, and the delay element, are each printed microstrip elements on the PCB board embodying the BALUN circuit, while the capacitors in the high and low pass networks are discrete components. These printed elements can be microstrip, embedded microstrip, or stripline elements. Alternatively, these elements could be composed of any other type of transmission line in place of the printed element or even discrete components. However, the printed transmission lines are preferred because they are the least costly and require the least amount of board space.
In one configuration, the PA is designed for a 2.4 GHz cordless handset system operation and the single ended output is connected to a low pass filter. The signal is passed through the filter before being transmitted via an antenna. In this implementation, the component values and circuit characteristics are chosen for 2.4 GHz operation.
In a second implementation, the design is used in a 900 MHz cordless handset system. In this case, the component values and circuit characteristics are selected for 900 MHz operation. Additional implementations are possible in which the design is utilized in a direct sequence spread spectrum (DSSS) wireless system, a Frequency Hop spread spectrum (FHSS) wireless system, a wireless cellular system, a wireless local area network (WLAN) system, a Wireless Modem, a security system, or a wireless inventory system. In fact, the design can be utilized in any system that uses a differential PA keeping in mind that, in each of these implementations, the operating frequency of the PA must be accounted for when selecting component values.
A method of operation for the subject invention comprises the steps of: advancing the phase of a positive phase output of a differential PA a first amount; retarding the phase of a negative phase output of the differential PA a second amount, the first and second amounts being such that, at a point of combination, the adjusted phases of the positive and negative PA outputs are about equal; adjusting the output impedance of the positive phase output of the PA so that, at the point of combination, it is a desired value; adjusting the output impedance of the negative phase output of the PA so that, at the point of combination, it is a desired value; and combining the adjusted positive and negative phase outputs of the PA at the point of combination to form a single-ended output, such that the output impedance of the single-ended output is about equal to a desired output impedance.
In one embodiment, the desired output impedance is a resistive output impedance Z0. In this embodiment, the first adjusting step comprises adjusting the output impedance of the positive phase output of the PA such that, at the point of combination, it is about equal to twice Z0, and the second adjusting steps comprises adjusting the output impedance of the negative phase output of the PA such that, at the point of combination, it is about equal to twice Z0.
In one implementation, the second adjusting step comprises the substeps of retarding the phase of the negative phase output of the PA by a third amount, and then further retarding the phase of this negative phase output by a fourth amount, the first, third, and fourth amounts being such that, at the point of combination, the adjusted phases of the positive and negative phase PA outputs are about equal.
A method of implementing the subject invention comprises the steps of: coupling to a positive phase output of a PA a lead network configured to advance the phase of the positive phase output of the PA by a first amount and to adjust the output impedance thereof to about twice a desired resistive output impedance Z0; coupling to a negative phase output of the PA a lag network configured to retard the phase of the negative phase output of the PA by a second amount and to adjust the output impedance thereof to about twice the desired resistive output impedance Z0; coupling in series with the lag network a delay element configured to further retard the negative phase output of the PA by a third amount, the first, second, and third amounts being such that, at a point of combination, the adjusted phases of the positive and negative PA outputs are about equal; and combining the outputs of the delay element and the lead network at the point of combination to form a single-ended output, such that the output impedance of the single-ended output is about equal to the desired resistive output impedance Z0.
A benefit of the BALUN circuit of the subject invention is that it combines the functions of PA output matching, and BALUN transforming into a single circuit.
Another benefit is that it is easy to implement in comparison to a conventional BALUN circuit.
A third benefit is that it is very low in cost, and consumes little space, compared to a conventional BALUN circuit.